As semiconductor manufacturing techniques continuously progress, not only the size but also the manufacturing costs of electronic components are reduced. Common semiconductor manufacturing techniques in the recent years are limited to form a planar semiconductor structure through etching, ion implantation, distribution and wiring on a substrate to achieve a chip size as small as 6F2. However, since the speed of miniaturization of feature size has gradually become slow, the techniques above no longer render a noticeable area reduction for a semiconductor component on a wafer. Hence, a vertical semiconductor (or referred to as a three-dimensional semiconductor) manufacturing technique is then developed. In the vertical semiconductor manufacturing technique, a semiconductor is vertically grown on a wafer to reduce the area occupied by transistors on the wafer surface, thereby further reducing the chip size to 4F2.
The vertical transistors are generally manufactured through a stack approach or a trench approach. In the trench approach for forming a vertical transistor, a substrate is excavated downwards to form a plurality of trenches and a plurality of posts each being disposed between any two of the trenches. By performing ion implantation, ion diffusion or deposition to the posts as well as performing a semiconductor manufacturing process in the trenches, the vertical transistor is formed. The U.S. Pat. No. 7,554,148 “Pick-up Structure for DRAM Capacitor” discloses a manufacturing process for a DRAM, in which a doped band is formed at a bottom of a trench for electric conduction. To prevent issues of damages, current leakage and high impedance of the substrate, the process of forming the doped band requires characteristics of high stability, high positioning accuracy and high concentration in order to form the high-concentration doped band at a correct position. A conventional method for providing the doped band includes poly doping and ion implant. However, the concentration yielded by poly doping is rather low and difficult to adjust, such that a conductive segment having a low impedance value cannot be formed through ion diffusion. As a result, the method of poly doping renders unsatisfactory feasibility. Referring to FIG. 1, the ion implant is capable of accurately controlling the doping concentration, and is also capable of injecting ions to sidewalls 2 or a bottom surface 3 of a trench 1 to form a low-impedance conductive segment 4 at a predetermined position. With great progress of the semiconductor manufacturing techniques, an aspect ratio of the trench 1 keeps increasing. Since the depth of the trench 1 is much greater than the width of the trench 1, ions need to be injected to the predetermined position at an angle more parallel to the depth of the trench, but this process is quite difficult to practice. Further, not only the position but also the area to which the ions are injected is difficult to control, resulting in a current leakage or a low ion diffusion rate in the trench 1 as setbacks.
Therefore, there is a need for a solution for overcoming issues of the low diffusion rate, the damage of the substrate due to ion injection and the current leakage caused by an incorrect ion implant region, as well as for increasing the doping concentration to lower the impedance.